Document ID: docs/research/T81_FULL_REASSESSMENT_2026-10-25.md
Date: October 25, 2026
Status: Complete / Final Research Assessment
Author: Independent Principal Research Engineer & Systems Auditor
Target Repository: T81 Foundation (t81dev/t81-foundation)
Pinned Snapshot Baseline: Commit 962fb5ef24b012f91a1a3d1cb18a12d2145e66f0 (Main Branch)
Continuity Baseline: Commit 860558b4ad1cf4160af30860b00b15c46165acd5
The T81 Foundation repository represents an experimental scientific research framework and software engineering substrate focused on two main research domains:
experiments/packed_ternary_matvec/). Software CPU ternary optimization is formally frozen (STOP status). This negative finding is scoped strictly to software emulation on binary hardware and does not disprove physical ternary hardware or alternative device representations. 2-bit packing is retained strictly as an efficient on-disk weight storage and interchange format.examples/governance/accountable-computation/ and experiments/research_001/) demonstrate that pre-side-effect policy enforcement and offline auditability do not inherently require a custom virtual machine (T81VM/TISC). A conventional WebAssembly runtime (Wasmtime) with host FFI capability boundaries and detached canonical evidence bundles (RFC-00D4) achieves equal 0.0% policy breach rates under test conditions and detached evidence auditability with lower system complexity.A comprehensive audit of the primary subsystems in the repository yields the following implementation, testing, and operational status:
| Subsystem | Implemented Role | Key Source Paths | Test & Verification Coverage | Implementation Status |
|---|---|---|---|---|
| TISC ISA (v1.9.0) | 81-opcode instruction set architecture for T81 execution | include/t81/isa/opcodes.hpp, src/isa/ |
tests/cpp/test_isa.cpp, CTest #391–396 |
Frozen (v1.9.0) |
| T81VM Interpreter | Virtual machine executing TISC bytecode with DCP determinism | src/vm/vm.cpp, include/t81/vm/vm.hpp |
tests/cpp/vm_determinism_property_test.cpp |
Beta Runtime |
| Axion Policy Kernel | Pre-dispatch policy evaluation engine (eval_axion_call) |
src/axion/, include/t81/kernel/axion/ |
tests/cpp/axion_agent_invoke_policy_test.cpp, CTest #154 |
Alpha Governance |
| CanonFS | Content-addressed storage and foreign filesystem interchange (RFC-00D1) | src/core/fs/, include/t81/fs/ |
tests/cpp/canonfs_test.cpp, CTest #84–85 |
Beta Identity FS |
| T81Lang Tooling | Frontend lexer, parser, AST, IR generator, and bytecode compiler | src/lang/, include/t81/lang/ |
tests/cpp/test_lang.cpp, t81 code check/build |
Beta Language |
| Model Intake Bridge | GGUF/Safetensors model header inspection & tensor inventory | src/tools/model/, tools/cli/ai/ |
t81_weights_load_test (CTest #166) |
Metadata Bridge |
| Determinism Facilities | Soft-float math (RFC-0030 CORDIC), bit-exact containers, CanonHash-81 | src/core/isa/math/, vm/determinism/ |
CTest #355–362 | Functional / DCP |
| Ternary / Base-81 Codecs | SWAR SIMD emulation, Base-81 tryte packing, 2-bit codecs | src/core/codec/, src/isa/math/quantization/ |
tests/cpp/test_swar.cpp, test_base81_simd.cpp |
Experimental / Frozen |
| Accountable Evidence (RFC-00D4) | Detached evidence bundle generator & verifier | examples/governance/accountable-computation/ |
t81_accountable_experiment (CTest #4) |
Research Reference |
FetchContent), OpenSSL (optional for Ed25519 signing).The historical progression of the T81 computational concepts spans four distinct phases:
[ Knuth Seminumerical Algorithms ]
(Balanced ternary, positional number systems, 3-valued logic)
|
v
[ Hanoi CWEB Exploration ]
(CWEB implementation, 41 historical source blobs, experimental arithmetic)
|
v
[ T81Lang / TISC ISA / T81VM Engine ]
(TISC v1.9.0 opcode frozen specification, C++ interpreter, SWAR ternary vectorization)
|
v
[ Axion Policy OS & CanonFS Core ]
(Fail-closed pre-dispatch governance, content-addressed storage, decision bundles)
|
v
[ T81 Foundation Stack ]
(Deterministic execution, policy-gated AI runtimes, accountable computation framework)
experimental/hanoi/ preserves the CWEB-based exploration of ternary state machines. Historical audits identified 41 shared source blobs transferred from Hanoi.docs/research/TERNARY_ARITHMETIC_AND_RADIX_COMPARISON.md).The project evaluates eight canonical hypotheses under its Master Continuity Charter (docs/research/continuity/MASTER_CONTINUITY_CHARTER_v1.0.md and docs/research/continuity/HYPOTHESIS_REGISTER_v1.json). Canonical identifiers and statements are preserved as authoritative:
experiments/radix_comparison/) proved software tryte addition is $10.6\times$ slower ($11.7\text{ ns}$ vs $1.1\text{ ns}$) than 64-bit binary ALU addition.TNOT_SWAR, TAND_SWAR, TOR_SWAR in include/t81/codec/base81_packed.hpp) was tested on binary vector units, but digit-unpacking tax offsets SIMD density gains on binary hardware.experiments/packed_ternary_matvec/) saves $75\%$ DRAM bandwidth ($0.25$ bytes/weight), but SIMD VPSHUFB bit-shuffle decode tax limits execution speed to $75.3\%$ of INT8 AVX2 ($12.91$ vs $17.15\text{ GFLOP/s}$) in cache.experimental/hanoi/. Re-specified under H04-R01 (Radix × Adaptation Discriminator) as a $2\times2$ exact trace model (Fixed/Adaptive Binary vs Fixed/Adaptive Ternary).rtl/core/t81_top.sv) and software VM in-kernel policy coupling (src/axion/ and src/vm/vm.cpp). In-VM pre-dispatch policy evaluation (eval_axion_call) prevents unauthorized side effects ($0.0\%$ breach rate under test conditions)..t81w) and detached evidence verification (RFC-00D4) implemented in tools/cli/ai/ and examples/governance/accountable-computation/.To maintain clarity without renumbering or altering the canonical H01–H08 register, empirical benchmark experiments in the repository map to the hypothesis framework as follows:
| Benchmark / Experiment | Target Surface / Command | Evaluated Hypotheses | Primary Findings & Scoped Verdicts |
|---|---|---|---|
| Radix Comparison | experiments/radix_comparison/ |
H01, H03 | Software tryte addition is $10.6\times$ slower than native 64-bit binary ALU addition. Falsifies software CPU ternary arithmetic speedup. |
| Packed Ternary MatVec | experiments/packed_ternary_matvec/ |
H02, H03, H06 | 2-bit packed weight format saves $75\%$ memory footprint, but SIMD bit-shuffle decode tax limits execution speed to $75.3\%$ of INT8 AVX2 in cache. |
| Accountable Computation (Baseline-X) | examples/governance/accountable-computation/ & experiments/research_001/ |
H04, H05, H06, H07 | Wasmtime + OPA host FFI capability baseline (Arm iii) achieves identical $0.0\%$ breach rates and $100\%$ detached evidence auditability with $10\times$ lower host C++ LOC. Proves accountable computation is a protocol, not a runtime requirement. |
| Cross-Platform Determinism (DCP) | tests/cpp/vm_determinism_property_test.cpp |
H07 | Bit-exact cross-platform execution and RFC-0030 soft-float transcendentals pass $100\%$ of property-based tests across x86_64, ARM64, and WebAssembly. |
| CanonFS Byte Identity & Interchange | src/core/fs/ & CTest #84–85 |
H07, H08 | Content-addressed storage (CanonHash-81) and foreign filesystem interchange (RFC-00D1) deliver immutable byte identity across systems. |
An audit of claims in former documentation against implemented code and test evidence reveals:
| Category | Claim Summary | Empirical Status | Source Evidence | Reassessment Finding |
|---|---|---|---|---|
| ISA / Runtime | “TISC v1.9.0 is a frozen, deterministic instruction set.” | SUPPORTED | include/t81/isa/opcodes.hpp, CTest #391–396 |
Core 81 opcodes and bit-exact execution are fully implemented and tested. |
| Policy Governance | “Axion policy checks prevent unauthorized side effects before dispatch.” | SUPPORTED | src/axion/, CTest #154 |
Pre-dispatch eval_axion_call fails closed and logs policy denials before state mutation. |
| Artifact Storage | “CanonFS provides content-addressed artifact storage and interchange.” | SUPPORTED | src/core/fs/, CTest #84–85 |
CanonFS import, export, and foreign interchange (RFC-00D1) function as specified. |
| Deterministic Soft-Float | “RFC-0030 soft-float transcendentals provide cross-platform parity.” | SUPPORTED | src/core/isa/math/, CTest #355 |
Soft-float CORDIC math provides bit-exact parity across x86_64 and ARM64. |
| Ternary CPU Speedup | “Software Base-81 / SWAR ternary execution accelerates computation on binary CPUs.” | CONTRADICTED | experiments/radix_comparison/ |
Software tryte addition is $10.6\times$ slower than native 64-bit binary ALU addition. |
| MatVec Inference | “2-bit packed ternary MatVec executes faster than INT8 AVX2.” | CONTRADICTED | experiments/packed_ternary_matvec/ |
VPSHUFB 2-bit MatVec reaches $75.3\%$ of INT8 AVX2 speed due to SIMD decode instruction tax. |
| Custom VM Requirement | “Accountable computation requires a custom VM and kernel.” | UNSUPPORTED | examples/governance/accountable-computation/ |
Wasmtime + OPA + RFC-00D4 evidence schema provides equivalent policy and audit guarantees. |
| Hardware Platform | “T81 runs on physical ternary microprocessors.” | UNSUPPORTED | Repository inspection | No physical ternary hardware exists in the codebase; all execution uses binary hardware emulation. |
std::system and shell expansion to prevent command injection risks.t81::support::run_process (include/t81/support/process.hpp) with explicit argument vectors."C:\Program Files"), requiring string trimming before passing to std::filesystem::path.experiments/durable_witness/) established that an isolated SQLite WAL witness store remains vulnerable to snapshot rollback without an external monotonic checkpoint or log. HMAC receipts must sign all metadata fields (witness_id, payload_hash, total_amount, timestamp).examples/research/validated-descriptors/runner.cpp line 144 should be cleaned up during maintenance.GF2P8AFFINEINVQB).Research experiments proceed along established sequence tracks defined in the Master Continuity Charter:
docs/research/continuity/H04_RADIX_ADAPTATION_DISCRIMINATOR.md and docs/research/continuity/probes/storage_boundary.py) establish conditional mathematical model support with explicit counterexamples (e.g. at capacity $M=256$ and per-element cost ratio $C_3/C_2=1.5$, ternary requires 6 trytes = 9 cost units vs binary 8 bits = 8 cost units, despite $1.5 < \log_2 3 \approx 1.585$). This is a mathematical/model derivation under explicit symbol assumptions, not physical hardware or speed proof.libm floating-point execution.tests/determinism/ and vm/determinism/.CanonHash81.The root README.md was rewritten to align project documentation with empirical source code evidence:
962fb5ef24b012f91a1a3d1cb18a12d2145e66f0860558b4ad1cf4160af30860b00b15c46165acd5cmake -B build -G Ninja -DCMAKE_BUILD_TYPE=Release -DT81_BUILD_TESTS=ONninja -C build t81 t81_radix_comparison t81_packed_ternary_matvecpython3 scripts/ci/run_research_regressions.py --build-dir build (Result: 8/8 tests passed in 4.68s)include/t81/isa/opcodes.hppsrc/vm/vm.cppsrc/axion/src/core/fs/experiments/radix_comparison/experiments/packed_ternary_matvec/examples/governance/accountable-computation/docs/research/TERNARY_RESEARCH_CLOSURE_AND_NEXT_HYPOTHESIS.mddocs/research/consolidation/README.md