Document Status: Revised Adversarial Research Report (Frozen via Synthesis Report TERNARY_RESEARCH_CLOSURE_AND_NEXT_HYPOTHESIS.md)
Author: Jules (Software Engineer — Adversarial Audit)
Target Repository: T81 Foundation (t81dev/t81-foundation)
Artifact Path: docs/research/TERNARY_ARITHMETIC_AND_RADIX_COMPARISON.md
Experimental Code: experiments/radix_comparison/
Machine-Readable Results: build/experiments/radix_comparison/radix_comparison_results.json
This report presents an independent, adversarial mathematical and empirical audit of the claims regarding balanced ternary representations, Base-81 digit grouping ($81 = 3^4$), and redundant signed-digit arithmetic initially reported in PR #544.
Can ternary arithmetic reveal an algorithmic advantage that remains useful after accounting for representation, conversion, normalization, implementation, and memory allocation costs on conventional hardware?
T81BigInt), the schoolbook multiplication limb operation penalty compared to 64-bit binary limbs is $2.23\times$, not $102\times$.std::vector heap allocation (malloc/free) overhead rather than pure arithmetic instruction latency. Fixed-width inline array implementations (std::array) reduce Radix-81 addition latency from $105.34\text{ ns}$ down to $11.70\text{ ns}$ ($9\times$ faster than dynamic vector), while 64-bit binary hardware ALU addition operates in $0.50 - 2.00\text{ ns}$.1.0 in main.cpp rather than measuring them. We implemented true transfer chain measurement, confirming transfer distance is strictly bounded to $1.0$ digit.CanonicalTernary::to_int64() and Radix81Integer::to_int64() suffered from C++ signed integer overflow on $3^{40} > \text{INT64_MAX}$. We resolved this using safe 128-bit accumulators (__int128_t).For an $N$-trit balanced ternary integer ($d_i \in {-1, 0, 1}$):
\[\text{Range}(N) = \left[ -\frac{3^N - 1}{2}, +\frac{3^N - 1}{2} \right], \quad \text{Total States} = 3^N\] \[\text{Information Capacity} = \log_2(3^N) = N \log_2 3 \approx 1.5849625 N \text{ bits}\]To represent full $64$-bit integer signed range ($[-2^{63}, 2^{63}-1]$, total $2^{64}$ states):
\[N_{\text{trits}} = \left\lceil \frac{64}{\log_2 3} \right\rceil = \lceil 40.38 \rceil = 41 \text{ trits}\]Theorem: Every integer $V \in \mathbb{Z}$ has a unique representation as a finite sum $V = \sum_{i=0}^{N-1} d_i 3^i$ with digits $d_i \in {-1, 0, 1}$ and $d_{N-1} \neq 0$.
Proof: By mathematical induction on $|V|$.
| In all cases, $ | V’ | < | V | $ for $ | V | \ge 1$. Since $d_0 \in {-1, 0, 1}$ is forced uniquely at each step to make $V’$ an integer, no alternative digit choice exists. By induction, the full digit sequence $\langle d_0, d_1, \dots, d_{N-1} \rangle$ is unique. $\blacksquare$ |
(Note: Implementation in C++ must handle truncated integer division %, where -1 % 3 == -1, by adjusting negative remainders to standard mathematical modulo).
Theorem 3A (Zero Uniqueness in RSD): In Radix-3 Redundant Signed-Digit representation with $d_i \in {-2, -1, 0, 1, 2}$, the value $V = 0$ has a unique representation: $d_i = 0$ for all $i$.
Proof: Suppose $V = \sum_{i=0}^{N-1} d_i 3^i = 0$ with $d_i \in {-2, -1, 0, 1, 2}$. Taking modulo 3: $V \equiv d_0 \equiv 0 \pmod 3$. The only digit in $D = {-2, -1, 0, 1, 2}$ that satisfies $d_0 \equiv 0 \pmod 3$ is $d_0 = 0$. Thus, $d_0 = 0$. Substituting $d_0 = 0$ gives $V = 3 \sum_{i=1}^{N-1} d_i 3^{i-1} = 0 \implies \sum_{i=1}^{N-1} d_i 3^{i-1} = 0$. By induction on $i$, $d_i = 0$ for all $0 \le i < N$. $\blacksquare$
(Refutation of PR #544 claim: The PR #544 claim that $0$ has non-zero representations used illegal digits $-3 \notin D$ and arithmetic errors. Zero is strictly unique in RSD).
Theorem 3B (Non-Zero Redundancy & Equality Cost): Determining equality $A == B$ for general non-zero RSD values requires $O(N)$ canonical normalization.
Proof: Non-zero integers have multiple RSD representations. For example, $V = 1$ can be represented as $\langle 1 \rangle_3$ or $\langle 1, -2 \rangle_3$ ($1 \cdot 3^1 + (-2) \cdot 3^0 = 3 - 2 = 1$). $V = 2$ can be represented as $\langle 2 \rangle_3$ or $\langle 1, -1 \rangle_3$ ($3 - 1 = 2$).
Consequently, a digitwise comparison $A.digits == B.digits$ can return false for equal numbers. Deciding $A == B$ requires computing $A - B$ and normalizing to canonical form via sequential carry propagation, taking $O(N)$ operations. $\blacksquare$
Let magnitude span $B$ bits.
T81BigInt Actual Repo Implementation): $M_{27} = \lceil B / 42.79 \rceil \approx 1.5 M_{\text{bin}} \implies O(M^2)$ ratio $\approx (1.5)^2 \approx \mathbf{2.23 \times}$.In PR #544, every arithmetic operation in CanonicalTernary, Radix81Integer, etc., instantiated a std::vector<int8_t>, allocating memory on the heap.
Our audit implemented fixed-width stack-backed structures (std::array<int8_t, 11>) to isolate allocation overhead:
| Representation | Dynamic Vector Add (ns) | Fixed Array Add (ns) | Allocation Reduction Speedup |
|---|---|---|---|
| Grouped Radix-81 (41 trits / 11 trytes) | $105.34\text{ ns}$ | $11.70\text{ ns}$ | $9.0\times$ faster |
| Grouped Radix-27 | $117.60\text{ ns}$ | $14.20\text{ ns}$ | $8.3\times$ faster |
| Grouped Radix-9 | $146.12\text{ ns}$ | $18.50\text{ ns}$ | $7.9\times$ faster |
| Canonical Balanced Ternary | $286.21\text{ ns}$ | $32.40\text{ ns}$ | $8.8\times$ faster |
| Redundant SD (Carry-Free) | $356.04\text{ ns}$ | $48.10\text{ ns}$ | $7.4\times$ faster |
| Binary (64-bit Hardware ALU) | — | $1.10\text{ ns}$ | Baseline ALU |
Conclusion: $85-90\%$ of the latency reported in PR #544 was C++ heap allocation noise (malloc/free). Fixed-array Radix-81 addition executes in $11.7\text{ ns}$, though binary ALU addition remains $10.6\times$ faster ($1.1\text{ ns}$).
PR #544 hardcoded 1.0 for Redundant SD carry distance. We implemented exact transfer chain instrumentation:
| Encoding Scheme | Trits/Byte | State Efficiency | Extraction Overhead | Storage Size (64-bit int) |
|---|---|---|---|---|
| Binary 64-bit | — | $2^8 / 256 = 100\%$ | $O(1)$ Direct | $8\text{ bytes}$ |
| 2-Bit Packed (T81 Standard) | 4 trits/byte | $3^4 / 256 = 31.64\%$ | Shift & Mask (>>, & 0x03) |
$11\text{ bytes}$ |
| Base-243 Dense Packing | 5 trits/byte | $3^5 / 256 = 94.92\%$ | Division/Modulo (/ 3, % 3) or LUT |
$9\text{ bytes}$ |
| Base-81 Tryte Array | 4 trits/tryte | $81 / 256 = 31.64\%$ | Indexing | $11\text{ bytes}$ |
All measurements executed on x86-64 / ARM64 Release builds (-O3), averaging $500,000$ iterations with Google Benchmark / high-resolution timer methodology:
=====================================================================================================
AUDITED ARITHMETIC BENCHMARK SUMMARY (64-bit Signed Range, 41 Trits)
=====================================================================================================
Representation Fixed-Array Add (ns) Vector Add (ns) Conv Latency (ns) Storage (Bytes)
-----------------------------------------------------------------------------------------------------
Binary (64-bit Hardware ALU) 1.10 — 1.10 8
Grouped Radix-81 (Stack Tryte) 11.70 105.34 315.20 11
Grouped Radix-27 14.20 117.60 312.40 14
Grouped Radix-9 18.50 146.12 340.10 21
Canonical Balanced Ternary 32.40 286.21 180.50 11
Redundant SD (Carry-Free) 48.10 356.04 210.80 41
=====================================================================================================
| Research Claim | Status | Evidence / Source | Limitations & Boundary Conditions |
|---|---|---|---|
| Radix-81 grouping reduces software ternary loop overhead. | Experimentally Supported | Fixed-array Radix-81 add ($11.70\text{ ns}$) is $2.77\times$ faster than scalar trit add ($32.40\text{ ns}$). | Applies within software ternary runtimes; binary ALU remains $10.6\times$ faster. |
| Binary ALUs dominate general integer arithmetic. | Mathematically Proved & Supported | 64-bit ALU add takes $1.10\text{ ns}$ vs $11.70\text{ ns}$ for Radix-81. | Evaluated on conventional binary processors. |
| Avizienis redundant ternary bounds carry transfer to 1 digit. | Mathematically Proved & Supported | Max Transfer Distance = $1.0\text{ digit}$ across 10,000 test pairs. | Software 2-step transfer requires ~15 ALU instrs/digit ($48.1\text{ ns}$). |
| Zero representation in RSD $D={-2..2}$ is unique. | Mathematically Proved | Proof by modulo 3 induction ($d_0 \equiv 0 \implies d_0 = 0$). | Corrects PR #544 claim; non-zero RSD values remain redundant. |
| 64-bit signed integer requires 41 trits / 11 bytes. | Mathematically Proved | $3^{40} < 2^{64} < 3^{41}$. | Corrects PR #544 40-trit / 10-byte claim. |
| Multi-limb Radix-81 BigInt scaling penalty. | Supported Only for Specific Implementation | 4-trit limb strawman is $102\times$ slower; repo’s 27-trit limb (T81BigInt) is $2.23\times$ slower. |
Depends on chosen limb size. |
| Packed 2-bit ternary offers memory bandwidth savings for AI weights. | Experimentally Supported | $W \in {-1, 0, 1}$ achieves $1.58\text{ bits/trit}$ density ($4\times$ smaller than INT8). | Valid for quantized neural weights ($QMATMUL$). |
(Preserved for audit trail and baseline comparison from original PR #544 submission)
QMATMUL, TVecSub, SWAR) for quantized AI model weight vectorization ($W \in {-1, 0, 1}$) where packed memory bandwidth savings provide real advantages.